Tag Archives: Micrel

Micrel Launches New Limiting Post Amplifier for 10Gbps FTTH PON Network

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Micrel Semiconductor has introduced SY88053CL and SY88063CL limiting post amplifier. Both devices support the expansion of the next generation passive optical network (PON) FTTH XGPON and 10GEPON optical line terminal (OLT) ideal for applications. The product line also applies to support multi-rate applications. Fiber optic transceiver module, the maximum rate is up to 12.5Gbps. Support for Ethernet, Fibre Channel, OTN and OBSAI data rate.
“These new devices offer an impressive number of features including a new level of high bandwidth, high input sensitivity with programmable, wide range SD Assert and LOS De-Assert threshold levels, 4dB of electrical hysteresis, and stable SD Assert and LOS De-Assert timing to meet the stringent requirements of next generation PON network,” stated Tom Kapucija,director of marketing for the high speed communications business, Micrel. “Thesse features enable link efficiency optimization with increased system reach, higher link up-time and higher payload bandwidth.”Vice president for the timing and communications business group, Rami Kanama, said, “As the demand for more data at higher speeds increases, carries need to meet this demand by upgrading their line-side equipment and revamping their networks. Micrel continues its effort in addressing this demand at the device level. Our new optical limiting amplifier delivers speed, performance, and features that is critical to solving technical difficulties facing next generation FTTH, Enterprise, and transport networks. With increased link efficiency, system operators can achieve higher data transmission performance and potentially reduce carries’ CapEx and OpEx.”
Both devices incorporate fast SD Assert and LOS De-Assert times across the entire differential input voltage range of 5mVPP to 1800mVPP which enables improved link efficiency and optimization. In 3mVPP to 30mVPP wide LOS / SD threshold range provides a 4dB electrical hysteresis.  Integrated 50 Ohm input and output impedances optimize high speed signal integrity while reducing external component counts and in turn, cost. TTL compatible JAM input enables a SQUELCH function by routing back the LOS or SD signal.
The SY88053CL enable user adjustable decision threshold adjustment for optimized Bit Erro Rate operation in noisy applications with asymmetrical noise distribution while the SY880563CL provides a user selectable Digital Offset Correction function that automatically compensates for internal device offsets in the high speed data path. Other features include multi-rate 1Gbps to 12.5Gpbs operations, optional LOS or SD output, selectable RXOUT +/ RXOUT- signal polarity (SY88053CL) and 25ps typical rise / fall time. Beyond the current customer demand through increased performance margins, improved manufacturability of the module, while reducing costs. By increasing each node and the downstream branch exceeds 512ns link budget margin established, to improve the efficiency and data throughput of the link. By optimizing in a noisy environment and the error rate or RAMAN EDFA Optical Amplifier noise characteristics of asymmetric compensation, expanding the system extends the scope to improve the data throughput.
Both devices offer a wide power supply range of 3.3V+/-10 percent and come in an industrial temperature range of -40 degC to +85-degC and a tiny 3mm x 3mm QFN package.
Source: www.fs.com/news/